1. Field of the Invention
The present invention relates to a ramp voltage generating apparatus having a ramp voltage generating circuit for generating a plurality of ramp voltages out of phase with each other, and an active matrix drive-type display apparatus.
2. Description of the Prior Art
In recent years, an organic electroluminescence display (hereinafter, referred to as “organic EL display”, and a display apparatus using the organic EL display as “organic EL display apparatus”) has been under development. Use of the organic EL display for a mobile telephone, for example, is being studied.
As a method of driving the organic EL display, there have been known a passive matrix drive type for driving the organic EL display in a time-division manner by using a scanning electrode and a data electrode, and an active matrix drive type for maintaining luminescence of each pixel over one vertical scanning period.
In the active matrix drive-type organic EL display, as shown in FIG. 13, each pixel 41 includes an organic EL element 40, a drive transistor TR2 for controlling on/off state of the organic EL element 40, a write transistor TR1 turning on in response to application thereto of a scanning voltage SCAN from a scanning electrode, and a capacitor C fed with a data voltage DATA from a data electrode when the write transistor TR1 is in the on state, wherein the output voltage of the capacitor C is applied to the gate of the drive transistor TR2.
First, a voltage is applied sequentially to the scanning electrodes, so that the plurality of write transistors TR1 connected to the same scanning electrode are turned on. Then, each data electrode is supplied with the data voltage (input signal) in synchronism with the scanning operation. Herein, the write transistor TR1 is in an on state; therefore, electric charges corresponding to the data voltage are accumulated in the capacitor C.
Next, an operating state of the drive transistor TR2 is determined by an amount of the electric charges accumulated in the capacitor C. When the drive transistor TR2 is turned on, a current of the magnitude corresponding to the data voltage is supplied to the organic EL element 40 through the drive transistor TR2. As a result, the organic EL element 40 is lighted with the luminosity corresponding to the data voltage. This lighted state is held over one vertical scanning period.
As described above, the analog drive-type organic EL display, in which the organic EL element 40 is supplied with a current corresponding to the magnitude of the data voltage and is thus lighted with the luminosity corresponding to the data voltage, has a problem of display irregularities. In an attempt to solve this problem, a digital drive-type organic EL display apparatus for expressing multiple tones by supplying the organic EL element with a pulse current having a duty ratio corresponding to the data voltage is disclosed in Japanese Patent Application Laid-Open No. H10-312173.
FIG. 14 shows a digital drive-type organic EL display apparatus proposed by the present applicant. This digital drive-type organic EL display apparatus is disclosed in Japanese Patent Application Laid-Open No. 2003-241711 (hereinafter, referred to as “Patent Document 1”). As shown in FIG. 14, an organic EL display 10 includes a display panel 4 composed of arrangement of a plurality of pixels in a matrix, and a scanning driver 2 and a data driver 3 connected to the display panel 4. The video signal supplied from a video source such as a TV receiver (not shown) is supplied to a video signal processing circuit 6 and is processed as required for image display. The resulting video signal of three primary colors RGB is supplied to the data driver 3 of the organic EL display 10.
A horizontal sync (synchronizing) signal Hsync and a vertical sync signal Vsync obtained from the video signal processing circuit 6 are supplied to a timing signal generating circuit 70, whereby a timing signal is supplied to the scanning driver 2 and the data driver 3.
Further, the timing signal obtained from the timing signal generating circuit 70 is supplied to the ramp voltage generating circuit 80, whereby, as described later, a ramp voltage used for driving the organic EL display 10 is generated and, then, is supplied to each pixel of the display panel 4.
The display panel 4 is composed of a matrix arrangement of pixels 42 having a circuit configuration as shown in FIG. 15. Each pixel 42 includes an organic EL element 40, a drive transistor TR2 for turning on/off the organic EL element 40 in accordance with the input of the on/off control signal to the gate thereof, a write transistor TR1 turned on upon application to the gate thereof of a scanning voltage from the scanning driver 2, a capacitor C fed with a data voltage from the data driver 3 when the write transistor TR1 is in an on state, and a comparator 43 for comparing a ramp voltage supplied from a ramp voltage generating circuit 80 and an output voltage of the capacitor C with each other, both the ramp voltage and the output voltage of the capacitor C being supplied to a pair of positive and negative input terminals of the comparator 43. The output signal of the comparator 43 is supplied to the gate of the drive transistor TR2.
A source of the drive transistor TR2 is connected with a current supply line 44, and the drain of the drive transistor TR2 is connected to the organic EL element 40. One of the electrodes (e.g., source) of the write transistor TR1 is connected to the data driver while the other electrode (e.g., drain) of the write transistor TR1 is connected to an end of the capacitor C and, also, to an inverted input terminal of the comparator 43. A non-inverted input terminal of the comparator 43 is connected with an output terminal of the ramp voltage generating circuit 80.
In the above organic EL display apparatus, as shown in FIG. 16A, one frame period is divided into a first-half scanning period and a second-half luminescence period.
During the scanning period, in a horizontal line, the write transistor TR1 constituting each pixel 42 is turned on by the scanning voltage applied from the scanning driver, so that the data voltage from the data driver is applied to and accumulated as electric charges in the capacitor C. As a result, one frame of data are set in all the pixels constituting the organic EL display apparatus.
The ramp voltage generating circuit 80, as shown in FIG. 16B, maintains a H-level voltage value during the first half, i.e., the scanning period of each one frame period, and a ramp voltage changing linearly from a L- to H-level voltage value is generated during the second half, i.e., the luminescence period.
During the first half period, i.e., the scanning period, the H-level voltage from the ramp voltage generating circuit is applied to the non-inverted input terminal of the comparator 43, so that the output of the comparator 43 always remain at H level as shown in FIG. 16C regardless of the voltage input to the inverted input terminal.
During the second half, i.e., the luminescence period, on the other hand, at the same time that the ramp voltage from the ramp voltage generating circuit is applied to the non-inverted input terminal of the comparator 43, the output voltage (data voltage) of the capacitor C is applied to the inverted input terminal of the comparator 43, so that the output of the comparator 43 takes either H or L value in accordance with the result of comparison between the two voltages as shown in FIG. 16C. Specifically, as long as the ramp voltage is lower than the data voltage, the output of the comparator 43 is at L level, while the output of the comparator 43 is at H level during the period when the ramp voltage is higher than the data voltage. The length of the period during which the output of the comparator 43 is at L level is proportional to the magnitude of the data voltage and may be different for a different pixel.
In this way, the output of the comparator 43 remains at L level only during the period when it is proportional to the magnitude of the data voltage. Thus, the drive transistor TR2 remains on during the same period, thereby turning on the power supplied to the organic EL element 40.
As a result, the organic EL element 40 of each pixel 42 emits light only during the period proportional to the data voltage for each pixel 42 in each frame period, thereby realizing the multitone expression.
In the organic EL display apparatus shown in FIG. 14, however, the luminescence is controlled in accordance with the data during the second half, i.e., the luminescence period after the data is written during the first half, i.e., the scanning period for all the pixels constituting the display panel 4, and therefore a high-speed scan operation is required. In the case where the scanning speed is low, the luminescence period is so short that an excessive peak current flows in the organic EL element, thereby increasing the effect of the voltage drop of the power line in the display panel.
In view of this, the present applicant has proposed an organic EL display apparatus in which the phase of the ramp voltage is shifted for each horizontal line as shown in FIG. 18, so that the light is emitted for each horizontal line immediately after the data is written for each horizontal line (Patent Document 1).
In this organic EL display apparatus, as shown in FIG. 17, the ramp voltage as a digital signal output from the ramp voltage generating circuit 80 is applied to each pixel of each horizontal line through a delay circuit 81 and a D/A converter 82 for each horizontal line. As a result, the phase of the ramp voltage supplied to each horizontal line, as shown in FIG. 18, is shifted by a predetermined delay time for every line from the first to the last. Incidentally, the data supplied from the data driver 3 is written immediately before the ramp voltage for each horizontal line increases.
With the organic EL display apparatus described above, all the horizontal lines can be scanned by consuming almost the entire frame period constituting the display period of one screen, and therefore no high-speed scan is required. Also, the ramp voltage curve for each horizontal line has a gentle inclination from L to H level over one frame period. In this way, substantially the whole of one frame period can be used as a luminescence period.
On the other hand, an organic EL display apparatus having the waveform generator shown in FIG. 19 is disclosed in Japanese Patent Application Laid-Open No. 2002-202746.
The waveform generator, which is for generating the ramp voltage changing in the sawtooth waveform from the clock pulse, is composed of two capacitors C11, C12, three switching elements SWa, SWb, SWc, an operational amplifier 83 having the gain of unity, and a low-pass filter 84 including one resistor R and one capacitor C13.
In the waveform generator, the three switching elements SWa, SWb, SWc are turned on/off, so that the output voltage changing in steps is produced from the operational amplifier 83. This output voltage is supplied to the low-pass filter 84 thereby to produce a ramp voltage changing in the shape of sawtooth wave.
In the organic EL display apparatus shown in FIG. 17, however, the provision of the D/A converter 82 for each horizontal line and the delay circuit 81 for each of the second to last lines poses the problem that the circuit configuration is complicated.
An configuration of the organic EL display apparatus is conceivable in which the waveform generator of FIG. 19 is arranged for each horizontal line and a phase-shifted ramp voltage is applied from each waveform generator to each horizontal line. Nevertheless, the provision of the low-pass filter 84 for each horizontal line complicates the circuit configuration of this organic EL display apparatus.